
PIC18F2423/2523/4423/4523
DS39755C-page 4
2009 Microchip Technology Inc.
Pin Diagrams
PIC
1
8F
252
3
10
11
2
3
4
5
6
1
8
7
9
12
13
14
15
16
17
18
19
20
23
24
25
26
27
28
22
21
MCLR/VPP/RE3
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS/HLVDIN/C2OUT
VSS
OSC1/CLKI(3)/RA7
OSC2/CLKO(3)/RA6
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2(2)
RC2/CCP1
RC3/SCK/SCL
RB7/KBI3/PGD
RB6//KBI2/PGC
RB5/KBI1/PGM
RB4/KBI0/AN11
RB3/AN9/CCP2(2)
RB2/INT2/AN8
RB1/INT1/AN10
RB0/INT0/FLT0/AN12
VDD
VSS
RC7/RX/DT
RC6/TX/CK
RC5/SDO
RC4/SDI/SDA
28-Pin PDIP, SOIC
PIC
1
8F
242
3
Note 1:
It is recommended to connect the bottom pad of QFN package parts to VSS.
2:
RB3 is the alternate pin for CCP2 multiplexing.
3:
OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not
being used as digital I/O. For additional information, see Section 2.0 “Oscillator Configurations” of the
“PIC18F2420/2520/4420/4520 Data Sheet” (DS39631).
10 11
2
3
6
1
18
19
20
21
22
12 13 14
15
8
7
16
17
23
24
25
26
27
28
9
PIC18F2423
R
C
0/T
1OS
O
/T1
3C
K
I
5
4
RB7
/KBI
3
/PG
D
RB6
/KBI
2
/PG
C
RB5
/KBI
1
/PG
M
RB4
KBI
0
/AN1
1
RB3/AN9/CCP2(2)
RB2/INT2/AN8
RB1/INT1/AN10
RB0/INT0/FLT0/AN12
VDD
VSS
RC7/RX/DT
RC6
/T
X
/CK
RC5
/SDO
RC4
/S
DI
/SDA
MC
LR
/V
PP
/RE
3
RA0
/A
N
0
RA1
/A
N
1
RA2/AN2/VREF-/CVREF
RA3/AN3/VREF+
RA4/T0CKI/C1OUT
RA5/AN4/SS/HLVDIN/C2OUT
VSS
OSC1/CLKI(3)/RA7
OSC2/CLKO(3)/RA6
RC1
/T
1
O
SI/CCP2
(2
)
RC2
/CCP1
RC3
/SCK/SCL
PIC18F2523
28-Pin QFN(1)